An overload frame, shown in Figure 2-5, has the same
format as an active error frame. An overload frame,
however, can only be generated during an interframe
space. In this way, an overload frame can be differentiated
from an error frame (an error frame is sent during
the transmission of a message). The overload frame
consists of two fields: an overload flag followed by an
overload delimiter. The overload flag consists of six
dominant bits followed by overload flags generated by
other nodes (and, as for an active error flag, giving a
maximum of twelve dominant bits). The overload
delimiter consists of eight recessive bits. An overload
frame can be generated by a node as a result of two
conditions:
1. The node detects a dominant bit during the
interframe space, an illegal condition.
Exception: The dominant bit is detected during
the third bit of IFS. In this case, the receivers will
interpret this as a SOF.
2. Due to internal conditions, the node is not yet
able to begin reception of the next message. A
node may generate a maximum of two
sequential overload frames to delay the start of
the next message.
CAN BUS MESSAGE FRAMES - Interframe Space
The interframe space separates a preceding frame (of
any type) from a subsequent data or remote frame.
The interframe space is composed of at least three
recessive bits called the Intermission. This allows
nodes time for internal processing before the start of
the next message frame. After the intermission, the
bus line remains in the recessive state (bus idle) until
the next transmission starts.
http://ww1.microchip.com/downloads/en/DeviceDoc/21801d.pdf
Posts
